We are pleased to announce that VPIphotonics is nominated for the PIC Award 2018 in the category Advances in Photonics Integration.
This award recognizes innovative approaches to new and commercially important PIC technology platforms, PIC packing, and PIC design that result in having
more features built into a chip and thus raising the bar to the next level.
VPIphotonics performed pioneering work with their tools supporting the
layout-aware schematic-driven design methodology. This concept enables a
smooth photonic and optoelectronic circuit design workflow starting with a logical idea and allowing designers to gradually elaborate its layout,
easily incorporating requirements such as adequate layout connectivity, packaging, and functional specifications. In close collaboration with other
software vendors and partnering foundries, VPI developed integrated design solutions allowing to combine graphical schematic capture, including
automated parameter sweeps and optimization even for parameters that affect the circuit layout, and automated waveguide routing of PICs utilizing
a single or a combination of different technology platforms.
The layout-aware schematic-driven design methodology allows circuit simulation and layout design tasks to be performed simultaneously, using
the same schematic capture environment. For this, a circuit-level simulator is seamlessly integrated with a layout design tool, providing designers
transparent access to the capabilities of both software packages. In particular, it becomes possible to directly specify in the circuit-level
simulator physical locations and orientations of PDK building blocks (BBs) on the final layout. Also, the library of PDK BBs is extended with a
set of elastic waveguide connectors (the same as provided by the underlying layout design tool), allowing sub-circuits having fixed locations to
be easily interconnected without the need to manually solve complex geometrical problems. The circuit simulator automatically, and invisibly for
users, invokes the layout design tool to determine the actual physical lengths and shapes of all elastic connectors, constructs compact simulation
models for them, and after that initiates the circuit simulations.
Foundry-specific PDK extensions for the VPIcomponentMaker Photonic Circuits simulator (VPItoolkit PDK <fab>) implement the novel
layout-aware schematic-driven PIC design methodology, for instance, supporting Multi-Process Waver runs at the open access foundries available
through JePPIX. In terms of this methodology, VPIcomponentMaker Photonic Circuits supports the capability to specify exact physical locations and
orientations of PDK BBs on the final layout, as it might be required by design-rule-check (DRC) and packaging specifications, and to connect
sub-circuits having fixed locations by smart elastic optical connectors.
This allows to combine graphical schematic capture and automated waveguide routing, which are currently considered separately and represent a
major problem for PIC designers. Key enabler for this functionality is the seamless integration of circuit and layout tools: VPIcomponentMaker Photonic Circuits extended by any of the VPItoolkit PDK <fab> automatically and invisibly
for users invokes a layout design tool (OptoDesigner by PhoeniX Software or
IPKISS by Luceda Photonics) to determine the actual physical lengths and shapes of all elastic connectors, constructs
compact simulation models for them, and after that initiates the circuit simulations.
Intermediate and final circuit design solutions can be exported automatically to OptoDesigner or
IPKISS to fit the layout to the die package,
add proper electrical wire routing, perform DRC verification, and generate a GDS mask for circuit fabrication.
The foundry-specific building blocks supported by a VPItoolkit PDK <fab> can be used alongside with a broad set of standard modules and
instrumentation in VPIcomponentMaker Photonic Circuits. These libraries include passive and active components with thoroughly tested and extensively
documented physical models, optical and electrical signal sources, as well as open interfaces for experimentally measured or numerically calculated
device models. Furthermore, flexible design and modeling capabilities are offered, including a unique hybrid time-and-frequency-domain modeling
(TFDM) approach for large-scale active photonic integrated circuits, support of hierarchical designs including parametric characterization, and
APIs for cosimulation with Python, Matlab and C++.
References:
[1] S. Mingaleev, A. Richter, E. Sokolov, S. Savitzki, A. Polatynski, J. Farina, I. Koltchanov, "Rapid virtual prototyping of complex photonic
integrated circuits using layout-aware schematic-driven design methodology", Proc. SPIE 10107 -- Smart Photonic and Optoelectronic Integrated
Circuits XIX, 1010708, (2017).
[2] A. Richter, S. Mingaleev, and I. Koltchanov, "PIC Design: Schematic Or Layout First? Both!", PIC Magazine, Issue 4 (March 2017). design innovations.
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